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Field Programmable Gate Arrays (FPGAs) for accelerating scientific and data-science codes


In the paper Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs, Gabriel Rodriguez-Canal, supervised by Nick Brown, both from EPCC integrated Fortran with HLS as part of an internship with HPE in collaboration with Tim Dykes, Jess Jones, and Utz-Uwe Haus. This enables HPC programmers to directly program FPGAs using Fortran and avoids an initial, time consuming first step of converting the code into C++. Due to the ubiquity of Fortran in HPC, we believe that this will significantly lower the burden to accelerating HPC codes on the technology. This paper was presented at the 33rd International Conference on Field-Programmable Logic and Applications.

The code is open source and under the Hewlett Packard Enterprise Development LP licence. It is available at